Thursday, February 16, 2012

PCIe Gen3 switch family Was Developed by PLX

 PLX Technology Inc, the technology and market share leader in PCI Express switches, bridges and 10GBase-T PHY solutions, has developed its PCI Express (PCIe) Gen3 switch family with three new devices, and they comply with the PCI Express Gen3 r1.0 Specification.

The new products include the PLX ExpressLane PEX8749 (48-lanes, 18 ports), PEX8733 (32 lanes, 18-ports), and PEX8725 (24 lanes, 10 ports) PCIe Gen3 switches. They are used in servers, storage, and communications.
SN74LVC2G14DCKR  SN74LVC1G32DCKR  SN74LVC2G74DCUR  SN75188N  KM4132G271BQ-10  LT1302CS8  LT1431CS8  LT1425CS  LT1640LCS8  MAX4259EEE  MAX4525CUB  LT1032CSW  LT1054CS8  LT1125CSW  LT1237CG

New PLX PCIe Gen3 multi-root switch device features include two NT (non-transparency) ports, four DMA (direct memory access) engines, two VCs (virtual channels), and up to 12 ports for SSC (spread spectrum clock) isolation.

The NT feature allows host failover and redundancy. In addition, it has been widely used by tier-one OEMs. The on-chip DMA engines can help engineers to increase the performance of systems via moving data among endpoints or between memory and endpoints with no CPU bandwidth sacrifice. Support for two VCs enable users to prioritize traffic to support desired quality of service. And the SSC clock isolation for each x4 port of the device allows designers to create large systems with each sub-system running its own SSC clock.

x16 and x8 ports offer native x2 and x4 ports that enable development of large arrays of SSD based systems with fewer switches. Besides, it also supports for PCIe specification ECNs (engineering change notices) such as multicast, ACS (access control service), ARI (alternative routing-ID interpretation), atomic operations, and OBFF (optimized buffer flush/fill).


The product is priced at $35- $70 and the production will be available in Q4.

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