Analog Devices, Inc. （ADI） released the ADL5336 and the ADRF6516

Analog Devices, Inc. (ADI) released the ADL5336 and the ADRF6516, which are two variable gain amplifier (VGA) products that feature new levels of integration and performance for designers of broadband communications systems. The ADL5336 VGA integrates a pair of programmable rms (root-mean-square) detectors and two IF (intermediate frequency) VGAs. The ADRF6516 VGA incorporates dual-channel, programmable, 6-pole low-pass filters and VGAs in a single chip.

The ADL5336, a cascadable analog dual IF VGA with two integrated rms detectors, can replace up to four discrete RF components plus additional passive discrete components. It can operate as two cascaded amplifiers or use independently, while the rms detectors can be programmed for independent gain control for each VGA. When the ADL5336 is configured in a cascaded VGA mode, the device provides a continuous gain control range of 48 dB. Individually, each VGA provides a gain control range of 24 dB. The maximum gain for each amplifier can be programmed via SPI control.

With excellent linearity and noise figure performance, the ADL5336 is used in applications requiring high dynamic-range such as point-to-multipoint radios and instrumentation and medical equipment.

The ADRF6516, a single-chip, matched pair of variable gain amplifiers with programmable low pass filters, is an ideal for baseband A/D converter driver applications. Each channel is capable of rejecting large out-of-band interferers while reliably boosting the wanted signal, thus reducing the bandwidth and resolution requirements on the analog-to-digital converters (ADCs). The excellent matching between channels and their high spurious-free dynamic range over all gain and bandwidth settings make the ADRF6516 ideal for quadrature-based (IQ) communication systems with dense constellations, multiple carriers, and nearby interferers.

The filters provide a six-pole Butterworth response with 1 dB corner frequencies programmable through the SPI port from 1 MHz to 31 MHz in 1 MHz steps. The preamplifier that precedes the filters offers a SPI-programmable option of either 3 dB or 6 dB of gain. The preamplifier sets a differential input impedance of 1600 Ω and has a common-mode voltage that defaults to VPS/2 but can be driven from 1.1 V to 1.8 V.

The variable gain amplifiers that follow the filters provide 50 dB of continuous gain control with a slope of 15.5 mV/dB. Their maximum gains can be programmed to various values through the SPI. The output buffers provide a differential output impedance of 30 Ω and are capable of driving 2 V p-p into 1 kΩ loads. The output common-mode voltage defaults to VPS/2, but it can be adjusted down to 900 mV by driving the high impedance VOCM pin. Independent, built-in dc offset correction loops can be disabled if fully dc-coupled operation is desired. The high-pass corner frequency is defined by external capacitors on the OFS1 and OFS2 pins and the VGA gain.

The setpoint for each integrated detector is also programmed via the SPI in 3-dB steps. An additional switch has been integrated to allow the second VGA to toggle between two input sources.

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