One Transistor FM Receiver circuit diagram

This is a very simple FM receiver which build based on one transistor only. No chip or another active component. The output is connected to earphones, you need an amplifier circuit if you want to listen the radio with a loudspeaker.

Part designator	Part description
C1a,C1b	10 pf, 50 v, ceramic disc capacitor
C2	22 pf, 50 v, ceramic disc capacitor
C3	RF tuning capacitor
C4	330 pf, 50 v, ceramic disc capacitor
C5,C8	0.001 uf, 50 v, ceramic disc capacitor
C6	0.22 uf, 50 v, film capacitor
C7	0.0047 uf, 50 v, ceramic disc capacitor
C9	22 uf, 16 v, electrolytic capacitor
D1	TL431AIZ voltage control Zener (shunt regulator)
EPH1	High impedance earphone
L2	22 uh RF choke
Q1	2N4416A JFET transistor
R1	470K, 1/4 w, resistor
R2, R3	1K, 1/4 w, resistor
R4	10K, 1/4 w, resistor
R5	1M, 1/4 w, resistor
R6	100 ohm, 1/4 w, resistor
S1	Small SPST switch
screws for C3	screws for mounting C3 (2 needed)
nylon screw	#4 nylon screw used for tuning C3
battery connector	mini battery snap

More instruction how to build this circuit, visit this page

Low Drift Sample and Hold

This is a circuit of low drift sample and hold. This circuit uses two JFET, Q1 and Q2 that provides the sample and hold capacitor, C1. Q1 provides a path, Rds(on), for C1 and turned on during sample. Q2 IGSS (<100 pA) and Q1 ID(OFF) (<50 pA) as the only discharge paths because Q1 is turned off, during hold. Here is the circuit :

Output current and feedback to the LM101 are supplied because Q2 serves a buffering function. [Source: http://www.hqew.net/circuit-diagram/Low-Drift-Sample-and-Hold_3452.html]

JFET Nixie Tube Driver

This is a driver circuit for nixie tube. This circuit uses 2N3684  as nixie tube drivers because its Vp is 2-5 volts which is ideally matches TTL-DTL logic level. Compared with bipolar transistor, the JFET is immune to almost all of the failure mechanism found in bipolar transistor. Here is the circuit :

To prevent breakdown of the JFETs, this circuit uses diodes that produces 50Volt prebias line. There is no voltage connection on the transistor ‘s can since the 2N3684 is in a TO-72 package. [Source: http://www.hqew.net/circuit-diagram/JFET-Nixie-Tube-Driver_3450.html]

Single Op-Amp Tone Control

This is single op-amp tone control circuit. This circuit is a hybrid low-pass, high pass and one-pole circuits with attenuation and gain. This circuit is the solution for limits cost because it requires a minimum component. Here is the circuit :

For the tone adjustments, the midrange frequency is 1 kHz. It gives about ±20 dB of cut and boost for treble and bass. Unlike other similar circuits, it uses linear instead of logarithmic pots. This circuit uses two different potentiometer values and same value capacitors except for the coupling capacitor. The ideal capacitor value is 0.016 μF, which is an E-24 value. So the more common E-12 value of 0.015 μF is used instead. It is easier to find an adball capacitor value than an oddball potentiometer value. You can use a passive (resistors) voltage divider for VCC/2 or you can use an active virtual ground circuit.

The second figure is a plots that show the response of he circuit with the pots at 1/4 and 3/4 and the extremes positions. The middle position is flat to within a few millidecibels. The pots are most sensitive towards the end of their travel, it was shown by the 1/4 and 3/4 positions are not exactly 10 and –10 dB. It gives more rapid adjustment near the extreme positions and a fine adjustment near the middle of potentiometers, which preferable to the listener. [Source: http://www.hqew.net/circuit-diagram/Single-Op$2dAmp-Tone-Control_3444.html]

Frequency Synthesizer

A frequency-selective frequency multiplier can be construct with a PLL system by inserting frequency divider inside the feedback between the phase detector input and the VCO output. Figure below shows the schematic diagram of low-frequency synthesizer with a programmable three decades divider circuit.

The frequency-divider modulus N have value between 3 to 999 with single steps increment. In locked condition, the comparator and signal are at same frequency that f=N*1kHZ.So we have a frequency synthesizer with 3KHZ to 999 KHZ range with 1-KHZ increment, which can be programed by the switch position of the divide-by-n counter.

This circuit uses phase comparator II because a frequency synthesizer shouldn’t lock on harmonics of the signal-input reference frequency. We can’t use phase comparator I because it does lock on harmonics. Phase comparator II correspond to this application because the active factor of the output of the divide-by-n frequency divider is not 50%. The VCO is set by Phase comparator II,to cover a range of 0 MHz to 1.1 MHz. This application have two-pole of the LPF. To faster locking for step changes in frequency this application have tag-lead filter. [Schematic diagram source: http://www.hqew.net/circuit-diagram/Frequency-Synthesizer_3415.html]

Self Powered Sine Wave to Square Converter

Only with a single chip active component (4069  IC), this circuit will convert sine to square waves without a power-source. To test some audio instruments, we can use this circuit. Device purpose: This circuit intended to pick up the a sine wave from an existing generator and then converts that wave into good square waves. This circuit doesn’t need power-source, so we can be simply connected between the device under test and a sine wave generator. C1,C2 D1 and D2 form a voltage doubler from the input sine wave that will used? as powers by IC. The inverter IC1A is used to amplifies the input sine wave, the others inverters is used to delivering and squaring an output square wave of good rise and fall times and equal ratio through the entire range 20Hz-20KHz.

Notes: An input sine wave amplitude from 1V RMS onwards will give us best performances of this circuit. Output square wave amplitude is proportional to input amplitude. For good performance we need minimum sine wave input amplitude of 750mV RMS. Output square wave amplitude with 1V RMS input: 3V peak to peak, with R2 set at max. Minimum output square wave amplitude: 2V peak to peak, with R2 set at max. The minimum input threshold can be lowered by substituting the two silicon diodes with germanium types (e.g. AA118, AA119)

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High Accuracy Sine Wave Oscillator

There are many applications that require stability in the operation, such as telecommunications, servos, and test equipment. They are using frequency-accurate sine-wave sources, but to find frequency-accurate sine-wave sources with satisfactory level of absolute accuracy and drift can be a problem, even if there are many such sine-wave oscillators are available.

To get less drift and greater accuracy ws can derive the sine wave from a digital source. We can gain desired fundamental sinusoid by removing the harmonics with a lowpass filter,because square waves consist of a fundamental at the square-wave frequency plus an infinite number of odd harmonics. This application fits using switched-capacitor filters. IC3 is an 8th-order, low-pass Butterworth type.

Switching or sweeping the frequency applied at C1 has a proportional effect on the sine-wave generator output Because the filter’s input and clock frequencies have a fixed ratio of 1:128. Switching or sweeping the frequency
will not affect output amplitude because this band is well below the smoothing filter’s 25kHz corner frequency. The frequencies that represent a potential cause of aliasing in this circuit—the odd-numbered harmonics that exceed half the clock rate—have insignificant amplitudes. So we do not have problem with Alias frequencies.

Source: http://www.hqew.net/circuit-diagram/High-Accuracy-Sine-Wave-Oscillator_3422.html